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Produktbild: Near-Capacity Variable-Length Coding

Near-Capacity Variable-Length Coding Regular and EXIT-Chart-Aided Irregular Designs

Aus der Reihe Wiley - IEEE

167,99 €

inkl. gesetzl. MwSt., Versandkostenfrei

Beschreibung

Produktdetails

Einband

Gebundene Ausgabe

Erscheinungsdatum

30.11.2010

Verlag

John Wiley & Sons

Seitenzahl

516

Maße (L/B/H)

24,6/17,3/3,3 cm

Gewicht

1012 g

Auflage

1. Auflage

Sprache

Englisch

ISBN

978-0-470-66520-6

Beschreibung

Produktdetails

Einband

Gebundene Ausgabe

Erscheinungsdatum

30.11.2010

Verlag

John Wiley & Sons

Seitenzahl

516

Maße (L/B/H)

24,6/17,3/3,3 cm

Gewicht

1012 g

Auflage

1. Auflage

Sprache

Englisch

ISBN

978-0-470-66520-6

Herstelleradresse

Produktsicherheitsverantwortliche/r
Europaallee 1
36244 Bad Hersfeld
DE

Email: gpsr@libri.de

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  • Produktbild: Near-Capacity Variable-Length Coding
  • About the Authors

    Other Wiley and IEEE Press Books on Related Topics

    Acknowledgments

    Preface

    Chapter 1 Introduction

    1.1 Historical Overview

    1.2 Applications of Irregular Variable Length Coding

    1.3 Motivation and Methodology

    1.4 Outline of the Book

    1.5 Novel Contributions of the Book

    Chapter 2 Information Theory Basics

    2.1 Issues in Information Theory

    2.2 AdditiveWhite Gaussian Noise Channel

    2.3 Information of a Source

    2.4 Average Information of Discrete Memoryless Sources

    2.5 Source Coding for a Discrete Memoryless Source

    2.6 Entropy of Discrete Sources Exhibiting Memory

    2.7 Examples

    2.8 Generating Model Sources

    2.9 Run-Length Coding for Discrete Sources Exhibiting Memory

    2.10 Information Transmission via Discrete Channels

    2.11 Capacity of Discrete Channels

    2.12 Shannon's Channel Coding Theorem

    2.13 Capacity of Continuous Channels

    2.14 Shannon's Message for Wireless Channels

    2.15 Summary and Conclusions

    I Regular Concatenated Codes and Their Design

    List of Symbols in Part I

    Chapter 3 Sources and Source Codes

    3.1 Introduction

    3.2 Source Models

    3.3 Source Codes

    3.4 Soft-Decoding of Variable Length Codes

    3.5 Summary and Conclusions

    Chapter 4 Iterative Source/Channel Decoding

    4.1 Concatenated Coding and the Turbo Principle

    4.2 SISO APP Decoders and Their EXIT Characteristics

    4.3 Iterative Source/Channel Decoding Over AWGN Channels

    4.4 Iterative Channel Equalisation, Channel Decoding and Source Decoding

    4.5 Summary and Conclusions

    Chapter 5 Three-Stage Serially Concatenated Turbo Equalisation

    5.1 Introduction

    5.2 Soft-in/Soft-outMMSE Equalisation

    5.3 Turbo Equalisation Using MAP/MMSE Equalisers

    5.4 Three-stage serially concatenated coding and MMSE equalisation

    5.5 Approaching the Channel Capacity Using EXIT-Chart Matching and IRCCs .

    5.6 Rate-Optimisation of Serially Concatenated Codes

    5.7 Joint Source-Channel Turbo Equalisation Revisited

    5.8 Summary and Conclusions

    II Irregular Concatenated VLCs and Their Design

    List of Symbols in Part II

    Chapter 6 Irregular Variable Length Codes for Joint Source and Channel Coding

    6.1 Introduction

    6.2 Overview of proposed scheme

    6.3 Transmission frame structure

    6.4 VDVQ/RVLC encoding

    6.5 APP SISO VDVQ/RVLC decoding

    6.6 Simulation results

    6.7 Summary and Conclusions

    Chapter 7 Irregular Variable Length Codes for EXIT Chart Matching

    7.1 Introduction

    7.2 Overview of proposed schemes

    7.3 Parameter design for the proposed schemes

    7.4 Simulation results

    7.5 Summary and Conclusions

    Chapter 8 Genetic Algorithm Aided Design of Irregular Variable Length Coding Components

    8.1 Introduction

    8.2 The free distance metric

    8.3 Overview of the proposed genetic algorithm

    8.4 Overview of proposed scheme

    8.5 Parameter design for the proposed scheme

    8.6 Simulation results

    8.7 Summary and Conclusions

    Chapter 9 Joint EXIT Chart Matching of Irregular Variable Length Coding and Irregular

    Unity Rate Coding

    9.1 Introduction

    9.2 Modifications of the EXIT chart matching algorithm

    9.3 Joint EXIT chart matching

    9.4 Overview of the transmission scheme considered

    9.5 System parameter design

    9.6 Simulation results

    9.7 Summary and Conclusions

    III Applications of VLCs

    Chapter 10 Iteratively Decoded VLC Space-Time Coded Modulation

    10.1 Introduction

    10.2 Space Time Coding Overview

    10.3 Two-Dimensional VLC Design

    10.4 VL-STCM Scheme

    10.5 VL-STCM-ID Scheme

    10.6 Convergence Analysis

    10.7 Simulation results

    10.8 Conclusions

    Chapter 11 Iterative Detection of Three-Stage Concatenated IrVLC FFH-MFSK

    11.1 Introduction

    11.2 System Overview

    11.3 Iterative decoding

    11.4 System parameter design and Results

    11.5 Conclusion

    Chapter 12 Conclusions and Future Research

    12.1 Chapter 1: Introduction

    12.2 Chapter 2: Information Theory Basics

    12.3 Chapter 3: Sources and Source Codes

    12.4 Chapter 4: Iterative Source/Channel Decoding

    12.5 Chapter 5: Three-Stage Serially Concatenated Turbo Equalisation

    12.6 Chapter 6: Joint source and channel coding

    12.7 Chapters 7 - 9: EXIT chart matching

    12.8 Chapter 8: GA-aided Design of Irregular VLC Components

    12.9 Chapter 9: Joint EXIT Chart Matching of IRVLCs and IRURCs

    12.10Chapter 10: Iteratively Decoded VLC Space-Time Coded Modulation

    12.11Chapter 11: Iterative Detection of Three-Stage Concatenated IrVLC FFHMFSK

    12.12Future work

    12.13Closing remarks

    Appendix A VLC Construction Algorithms

    A.1 RVLC Construction Algorithm A

    A.2 RVLC Construction Algorithm B

    A.3 Greedy Algorithm (GA) and Majority Voting Algorithm (MVA)

    Appendix B SISO VLC Decoder

    Appendix C APP Channel Equalisation

    Bibliography

    Glossary

    Subject Index

    Author Index