Analog Layout Generation for Performance and Manufacturability
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- Hardcover
- Taschenbuch ausgewählt
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Sprache:Englisch
92,99 €
UVP
106,99 €
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Beschreibung
Produktdetails
Einband
Taschenbuch
Erscheinungsdatum
09.12.2010
Verlag
Springer UsSeitenzahl
175
Maße (L/B/H)
23,5/15,5/1,1 cm
Gewicht
306 g
Auflage
Softcover reprint of hardcover 1st ed. 1999
Sprache
Englisch
ISBN
978-1-4419-5083-3
In the past, automatic analog layout tools tried to optimize the layout without quantifying the performance degradation introduced by layout parasitics. Therefore, it was not guaranteed that the resulting layout met the specifications and one or more layout iterations could be needed. In Analog Layout Generation for Performance and Manufacturability , the authors propose a performance driven layout strategy to overcome this problem. In this methodology, the layout tools are driven by performance constraints, such that the final layout, with parasitic effects, still satisfies the specifications of the circuit. The performance degradation associated with an intermediate layout solution is evaluated at runtime using predetermined sensitivities. In contrast with other performance driven layout methodologies, the tools proposed in this book operate directly on the performance constraints, without an intermediate parasitic constraint generation step. This approach makes a completeand sensible trade-off between the different layout alternatives possible at runtime and therefore eliminates the possible feedback route between constraint derivation, placement and layout extraction.
Besides its influence on the performance, layout also has a profound impact on the yield and testability of an analog circuit. In Analog Layout Generation for Performance and Manufacturability , the authors outline a new criterion to quantify the detectability of a fault and combine this with a yield model to evaluate the testability of an integrated circuit layout. They then integrate this technique with their performance driven routing algorithm to produce layouts that have optimal manufacturability while still meeting their performance specifications.
Analog Layout Generation for Performance and Manufacturability will be of interest to analog engineers, researchers and students.
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