About the Editors xxi
About the Contributors xxiv
A Special Tribute in Memory of Chih-Tang Sah [1932-2025] xxxv
Foreword xxxvii
Preface xxxix
History and Evolution of FET Technology
1 The Miraculous Evolution of the Field-Effect Transistor (FET): From Inception to Future Prospects 1
Hiroshi Iwai
1.1 Introduction 2
1.2 1925-1960: Early Concepts and Challenges in MOSFET Development 8
1.3 1960-1970: The MOSFET Instability Problem 22
1.4 From MOS ICs to MOS LSIs: 1965-1969 25
1.5 Technologies for MOS Integrated Circuits Developed Between 1965 and 1970 29
1.6 First-Generation LSIs-Al- or Si-Gate PMOS LSIs (1969-1971) with 10-8 micrometer Design Rules 33
1.7 Second-Generation LSI: From the Dawn of NMOS LSI to the Mid-1970s 36
1.8 First Generation of VLSI (3 ¿m NMOS Technology: Fourth Generation of LSI) Late 1970s to Early 1980s: Emergence of Dry Processing and Stepper Lithography 44
1.9 Transition from NMOS to CMOS in the Mid-1980s 49
1.10 Advances in Scaling Technologies-Introduction of Novel Process Techniques and Materials (1980s to Early
1990s) 52
1.11 Challenges in Scaling into the Sub-50 nm Regime from the Mid-1990s to the 2000s 60
1.12 Development of RF CMOS Device Technology from the Mid-1990s to the Late 1990s 68
1.13 Post-2000: Confronting the Limits of Miniaturization 72
1.14 Future Prospects 82
1.15 Summary and Concluding Remarks 84
2 MOSFET Device Structures and Physical Models: A Historical Review 109
Yuan Taur
2.1 MOSFET Device Structures 109
2.2 MOSFET Physical Models 121
2.3 Conclusion 143
3 Field-Effect Transistor R&D in the United States: Past, Present, and Future 147
Robert Chau and Suman Datta
3.1 Introduction 147
3.2 Early US FET R&D (1940s-1950s) 148
3.3 Birth of the MOSFET at Bell Labs (1950s-1960s) 149
3.4 Advent of CMOS as Low-Power Logic (1963-1970s) 150
3.5 Moore's Law and the Classical Scaling Era (1980s-1990s) 151
3.6 Moore's Law and the Era of Equivalent Scaling (Late 1990s-Early 2000s) 153
3.7 Inflection Point for FETs (2025 and Beyond) 160
3.8 FET Research in the Era of Zetta-Scale Computing (2030s) 162
3.9 Conclusion 165
4 Asia's FET R&D Innovations-Past, Present, Future 171
Carlos H. Diaz and Akira Toriumi
4.1 Introduction 171
4.2 Asia's Rise in the Semiconductor Industry: 1960-1990s 173
4.3 Logic Technology 183
4.4 Memory Technology 196
4.5 Thin Film Transistors (TFTs) 202
4.6 Compound Semiconductors: III-V FETs 204
4.7 Power FETs 205
4.8 Concluding Remarks 207
5 Fully Depleted SOI Technology-From Equation to Fabrication 221
Thomas Skotnicki and Stephane Monfray
5.1 Prologue (by Thomas Skotnicki) 221
5.2 Introduction 222
5.3 From Equation to Demonstration 223
5.4 From Lab to Fab 227
5.5 Technology Expansion and Scaling 230
5.6 Summary and Perspective 233
Applications and Process Integration
6 MOS-Based RAM 237
Jeonghoon Oh and Sangyeop Baeck
6.1 DRAM Transistor Technology 237
6.2 SRAM Transistor Technology 261
6.3 Conclusion 292
7 Development of Floating Gate FETs as Nonvolatile Memories 299
Stefan K. Lai, Koji Sakui, and Riichiro Shirota
7.1 Introduction 299
7.2 EPROM and EEPROM 300
7.3 NOR Flash 303
7.4 NAND Flash 308
7.5 Summary and Acknowledgment 321
8 FET-Based Logic Devices and Systems 325
Ghavam G. Shahidi
8.1 Introduction 325
8.2 From Dash-Dots and Relays to 0s and 1s and FETs 328
8.3 From the Invention of FET to the First Commercial FET-Based Microprocessor 328
8.4 The Quintessential FET-Based Device: The Personal Computer 330
8.5 Microprocessors: Enabling Next Node Manufacturing 332
8.6 Multiply-Accumulate: DSP, Digital Communications 335\
8.7 The Ultimate FET-Based Device: The iPhone 337
8.8 The Magnificent Computers: Data Centers (and the Environment) 339
8.9 GPUs and AI: Not Enough FLOPs 340
8.10 Energy Per Switch: How Much Lower? 342
9 SiC FETs for High-Power and High-Temperature Electronics 353
Tsunenobu Kimoto
9.1 Introduction-SiC for High-Power and High-Temperature Applications 353
9.2 Interface Properties and Channel Mobility in SiC MOSFETs 358
9.3 SiC Power MOSFETs 362
9.4 SiC Power JFETs and Comparison with Power MOSFETs, SiC Bipolar Switches 377
9.5 SiC CMOS ICs 381
9.6 SiC JFET ICs 383
9.7 Applications and Future Outlook for SiC FETs 386
10 III-V and III-N Field-Effect Transistors 395
Giovanni Ghione and Matteo Meneghini
10.1 III-V Field-Effect Transistors and ICs 395
10.2 III-N Field-Effect Transistors 404
10.3 Conclusions 415
11 CMOS Image Sensors: Driving the Digital Imaging Era 429
Yusuke Oike
11.1 Introduction 429
11.2 Historical Background and Fundamental Principles 430
11.3 Technological Advancements in the 2000s 434
11.4 Stacked Device Technologies 440
11.5 Pixel Performance Metrics and Enhancement Technologies 443
11.6 Extension of Sensing Capabilities 452
11.7 Emerging Technologies and Future Trends 459
12 The Thin-Film Transistor 475
Yue Kuo and Arokia Nathan
12.1 Original FET Concept and TFT Development History 475
12.2 Market Size and Growth 479
12.3 Structures, Thin-Film Materials, and Processes 479
12.4 Device Figures of Merit and Compact Models 481
12.5 Complex Material-Process-Device Relationship 487
12.6 Applications in Flat Panel Displays, Circuits, and Beyond 488
12.7 Emerging Applications and Challenges 496
12.8 Summary 498
13 How to Manufacture the Impossible: The Secrets of Process Integration for Hyper-scaled MOSFET Products 507
Kelin J. Kuhn
13.1 Introduction 507
13.2 The Secret of Self-Alignment 507
13.3 The Secret of Replacement Gate 511
13.4 The Secret of Fully Depleted Channels 515
13.5 What Happens Next? 521
14 50 Years of RF CMOS Design 523
Behzad Razavi
14.1 1966-1969: RF CMOS Is Born 523
14.2 1970: SPICE Is Born 525
14.3 1980: An Integrated Direct-Conversion RX Is Reported 526
14.4 Invasion of Analog Designers 526
14.5 1986-1988: RF CMOS-Again 527
14.6 1990s: High Integration and RF CMOS-Third Time Is a Charm 527
14.7 1993: The ¿¿ Fractional-N Synthesizer Is Born 531
14.8 Direct Conversion in CMOS 531
14.9 1996: Cadence Introduces a Noise Simulator for Time-Variant Circuits 532
14.10 2000s: Direct Conversion Matures 533
14.11 Effect of Technology Scaling 534
14.12 UWB, Cognitive, WiGig, and 5G Radios 534
14.13 Multiband, Multimode Radios Prosper 535
14.14 Phased-Array Transceivers 536
14.15 Conclusion 537
15 Compact FET-Based Device Modeling for Circuit Simulation 543
Mitiko Miura-Mattausch and Hans Jürgen Mattausch
15.1 Introduction 544
15.2 Transistor Operations 545
15.3 MOSFET Equations and Their Applications 548
15.4 Compact Modeling: Different Approaches 552
15.5 Compact Modeling: Model Standardization 556
15.6 Advanced Compact Modeling Important for Accurate Circuit Simulation 560
15.7 MOSFET-Descendant Compact Models for Wide Applications 570
15.8 Advanced FET Generations 581
15.9 Future Trends 584
15.10 Circuit Design Perspectives 584
15.11 Conclusion 585
16 Evolution of Photolithography in Semiconductor Manufacturing 597
Anthony Yen, Winfried Kaiser, and Akiyoshi Suzuki
16.1 Introduction 597
16.2 Contact/Proximity Printing of Integrated-Circuit Patterns 599
16.3 1× Projection Imaging of Mask Patterns onWafer 604
16.4 Step-and-Repeat Projection Lithography 606
16.5 Deep Ultraviolet and Step-and-Scan Lithography 613
16.6 193nm and (Ill-Fated) 157nm Lithography 620
16.7 193nm Immersion Lithography and Multiple Patterning 622
16.8 Extreme Ultraviolet Lithography 624
16.9 Summary and Outlook 631
17 Back-End-of-Line Interconnect Technology 651
Takayuki Ohba and Takashi Yoda
17.1 Introduction 651
17.2 Technology Evolution of Interconnect Modules 653
17.3 Emerging Era of Interconnects for Three-Dimensional Integration 665
17.4 Connecting Variation and Beyond 668
17.5 2.5D and 3D Processes Using Damascene Interconnects 671
17.6 Conclusion and Future Directions in Interconnect Technology 673
Current Status and Future Prospects
18 Three-Dimensional Field-Effect Transistor-From Concept to Computing to Artificial Intelligence 685
Digh Hisamoto and Samar K. Saha
18.1 Introduction 685
18.2 The Dawn of Semiconductor Devices and Computers 687
18.3 The Emergence of the Transistor Computer 689
18.4 Golden Age of Planar MOSFETs 692
18.5 Domain-Specific Hardware Era-The Emergence of Three-Dimensional Transistor: FinFET 695
18.6 Conclusions 702
19 Developments of GAAFET Technologies and Future Challenges 709
Dong-Won Kim
19.1 Introduction: Scaling limitations of Planar MOSFET and FinFET 710
19.2 Comparison of GAAFETs Candidates and Development History 715
19.3 Operation of GAAFET 721
19.4 Enhanced Design Considerations for GAAFET with Significant Modifications in Structural Components 735
19.5 Reliability Insights and Challenges in GAA MBCFET 752
19.6 Design Technology Co-Optimization for GAA MBCFET 757
19.7 Future of GAA MBCFET: Transition from Horizontal Scaling to Three-Dimensional Scaling 763
19.8 Conclusion 771
20 Contact Engineering and Performance Challenges in 2D-FETs 779
Chandan Biswas and Deji Akinwande
20.1 Introduction 779
20.2 Challenges in Electronic Properties of 2D Material Integration 790
20.3 Contact Engineering in 2D-FETs 793
20.4 Quantum Limit of Contact Resistance in 2D Field-Effect Transistors 799
20.5 Summary and Path Forward 804
21 Carrier Transport in MOSFETs: From Lilienfeld to Landauer 813
Mark Lundstrom
21.1 Introduction 813
21.2 A Focus on the Source 814
21.3 Drift-Diffusion Transport and Current Saturation in MOSFETs (~1960-1980) 815
21.4 The Velocity-Saturated MOSFET (~1980-1990) 817
21.5 Non-Local Transport in Deep-Submicron MOSFETs (~1985-2000) 818
21.6 The Ballistic MOSFET (~1994-2005) 822
21.7 The Quasi-Ballistic MOSFET (~1995-2015) 824
21.8 Quantum Transport (~1995-2015) 827
21.9 Discussion 829
21.10 Conclusions 831
22 What Is Next for FET? 839
Tsu-Jae K. Liu, Tahir Ghani, and Carolyn Duran
22.1 Introduction 840
22.2 Tunnel Field-Effect Transistors 848
22.3 Negative Capacitance FET 856
22.4 High-Mobility Channel Transistors 867
22.5 Nano-Electromechanical Switch (NEMS) 880
22.6 Sustainability 889
22.7 Summary and Concluding Remarks 893
References 895
Index 903
